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    BCD (Bipolar-CMOS-DMOS) Technologies for the Implementation of Smart Power ICs (SE414)

    SynopsisPower management has enjoyed tremendous market growth. The power management market is mainly driven by the mobile computer market, infrastructure replacement, alternative energy market, and improving efficiency of existing electronics. The core technology for the implementation of mixed-signal power management ICs is the BCD (Bipolar-CMOS-DMOS) technology. In recent years, the development of nanometer-scale CMOS technology has rendered many deep submicron CMOS processes (e.g. 0.25, 0.18 and 0.13um) obsolete. However, this type of production lines is a perfect work horse for the development of HV-CMOS and BCD technologies. With minimal processing changes, new life can be injected into these obsolete fabrication processes to produce high performance and low cost power management ICs.

    HV-CMOS and BCD fabrication technologies can be highly complex, but yet versatile. Process engineers and circuit designers must have good understanding on the performance, complexity, and cost tradeoff when planning products based on HV-CMOS and BCD technologies. The purpose of this course is to provide engineers with critical knowledge to appreciate the relevance of processing, device and circuit topology for power management ICs.

    Course highlight
    This course will begin with an overview of the smart power ICs technology in general, covering their applications and unique features that enabled proliferation of the power management IC market. This will be followed by a review of basic CMOS technology and bipolar transistors fabrication processes and device characteristics. The historical development of various types of discrete and integrated power semiconductor devices such as vertical and lateral power MOSFETs, Superjunction MOSFETs and IGBTs will be covered. In particular, we will examine the development of CMOS compatible high voltage fabrication processes. Special focus will be placed on the design of lateral power MSOFETs and how to achieve commonly desired characteristics such as low on-resistance, high breakdown voltage, small area utilization, low gate charge, fast switching speed, and ruggedness. A brief survey on current dedicated BCD (Bipolar-CMOS-DMOS) and CMOS compatible HV-CMOS fabrication technologies will be discussed. Special attention will be given to design challenges such as device layout, isolation techniques, limitations on power and thermal dissipation, gate drive circuits, and output stage segmentation. The importance of IC packaging and integration with micro-inductors and capacitors will also be covered. The second part of the course will cover design examples, from recent publications, that exploit the capabilities of the digital controller, including power conversion efficiency optimization, EMI suppression, dead-time control, and transient recovery. The purpose of this course is to provide the audience with an appreciation on the wide array of technologies required to effectively produce high performance power management ICs.

    What You Will Learn

    • Historical view of the solid-state technology
    • Operation of basic semiconductor devices (pn junction, MOSFETs, and bipolar transistors)
    • Review of CMOS fabrication processes
    • Basic power MOSFET structures and characteristics
    • Breakdown voltage, on-resistance, and safe operating area optimization
    • Layout considerations
    • Power output stages and gate drivers
    • Examples of smart power ICs
    • Examples of power management ICs

    Who Should AttendTechnicians and engineers who are involved in design, product marketing, production, test and development of CMOS products. An appreciation for analog IC and power management ICs would be helpful.

    PrerequisiteBasic knowledge in electronics at diploma or degree levels.

    Course MethodologyThe material will be delivered in an easy-to-follow seminar style. The audience is assumed to have only basic semiconductor physics background. 2D device simulation results will be used to illustrate the operation of various devices.

    Course Duration3 days, 9am - 5pm

    Course Structure

    • Introduction to Bipolar/CMOS/DMOS Technology
    • Historical perspective of semiconductor technology
    • Back to basic - pn junctions
    • Exercise
    • Breakdown voltage and on-resistance
    • LDMOS, RESURF concept
    • Bipolar junction transistors
    • Exercise
    • Integrated power devices
    • Smart power IC and BCD processing technologies
    • Survey of current technologies
    • Q&A

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